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gir489 Grandmaster Cheater
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Joined: 03 Jan 2012 Posts: 841 Location: Maryland, United States
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Posted: Sun Jun 23, 2019 12:33 pm Post subject: Feature request: NOP multiplier |
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When dealing with code caves, it's often hard for the developer to assign proper padding after the JMP to line up the assembly viewer with what it was before.
However, while I was reading an Intel assembler's handbook, I found that there's several instructions that are multibyte wide, that consume a similar operation as NOP. Generally, we don't even care about the efficiency cycles of these instructions, because it's just a spacer between the JMP to codecave, and the label of where the JMP RETURN needs to happen.
I have found someone has already documented up to 11 bytes of instructions that do absolutely nothing, and Cheat Engine seems to parse these fairly well. I suggest that instead of just generating something like 5 NOP instructions, it does something like:
| Code: | jmp newmem
nop x4
return: |
Where x4 is the number of bytes to consume.
Here is the table I mentioned: https://stackoverflow.com/questions/25545470/long-multi-byte-nops-commonly-understood-macros-or-other-notation
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FreeER Grandmaster Cheater Supreme
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Joined: 09 Aug 2013 Posts: 1091
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Posted: Sun Jun 23, 2019 1:41 pm Post subject: |
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I just glanced at it but it looks like the bytes/instructions used change... probably a lot simpler to just write nops, and if you happen to need a lot you can use lua to generate it | Code: | ...
{$lua}
return 'db ' .. ('90 '):rep(42)
{$asm}
... |
could probably make an AA command for that like DONOP(42) but... I don't actually use it that much.
Though perhaps it's simpler to do for DB than I'd imagine /shrug
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Dark Byte Site Admin
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Joined: 09 May 2003 Posts: 25857 Location: The netherlands
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Posted: Sun Jun 23, 2019 3:13 pm Post subject: |
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that is already in next CE, assuming your CPU supports multibyte NOP's ce will use it (of course not for the script template as there can be cpu's without that support)
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gir489 Grandmaster Cheater
Reputation: 14
Joined: 03 Jan 2012 Posts: 841 Location: Maryland, United States
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Posted: Sun Jun 23, 2019 5:20 pm Post subject: |
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| FreeER wrote: | I just glanced at it but it looks like the bytes/instructions used change... probably a lot simpler to just write nops, and if you happen to need a lot you can use lua to generate it | Code: | ...
{$lua}
return 'db ' .. ('90 '):rep(42)
{$asm}
... |
could probably make an AA command for that like DONOP(42) but... I don't actually use it that much.
Though perhaps it's simpler to do for DB than I'd imagine /shrug |
That's a terrible solution since you're still flooding the disassembler with NOP instructions.
The multibyte opcodes have been a thing since at least the Pentium 4s: https://software.intel.com/pt-br/forums/watercooler-catchall/topic/307174
I don't see a reason not to implicitly use the multibyte NOP instructions for padding.
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Dark Byte Site Admin
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Joined: 09 May 2003 Posts: 25857 Location: The netherlands
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Posted: Sun Jun 23, 2019 11:18 pm Post subject: |
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There are still users on cpu's older than 8 year old that use CE and not all AMD systems back then did not support multibyte (It's also not sse3 it's a separate feature )
and freeer there's also 'align 0c 90'
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gir489 Grandmaster Cheater
Reputation: 14
Joined: 03 Jan 2012 Posts: 841 Location: Maryland, United States
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Posted: Wed Jul 17, 2019 5:33 pm Post subject: |
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| Dark Byte wrote: | There are still users on cpu's older than 8 year old that use CE and not all AMD systems back then did not support multibyte (It's also not sse3 it's a separate feature )
and freeer there's also 'align 0c 90' |
Why do the many have to suffer for the few? Just make the instruction nop x5 check if the CPU can handle multibyte NOP instructions and if it can't, have the assembler spit out 5 NOP instructions instead of the 5 byte NOP.
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