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Dark Byte Site Admin Reputation: 458
Joined: 09 May 2003 Posts: 25291 Location: The netherlands
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Posted: Thu Jan 25, 2018 11:01 am Post subject: |
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dr0 to dr3 contain addresses (or IO ports but let's not go into that for now...)
and dr7 is a bitfield split up into 4 sections (of 6 bits) and 8 bits for other features (global debug, break on TRAP, debug type handing, and old stuff used for before pentium cpus)
each debugreg section specifies if it's enabled or not, and if it should keep enabled when going through intel taskswitches or not.
And it contains the length of the breakpoint (1,2,4 or 8 bytes) and the type (execute, write, read/write, io port)
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OldCheatEngineUser Whateven rank Reputation: 20
Joined: 01 Feb 2016 Posts: 1587
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Posted: Thu Jan 25, 2018 11:18 am Post subject: |
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thats interesting, i wanna read more about it.
which volume/chapter contain infos about this, im pointing to intel architecture software developers manual (ia-sdm)
also a question here about io-ports, did you meant hardware level? ie motherboard io?
if so then that means the user can also debug io's from HW-Ports?
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Dark Byte Site Admin Reputation: 458
Joined: 09 May 2003 Posts: 25291 Location: The netherlands
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Posted: Thu Jan 25, 2018 11:31 am Post subject: |
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Intel® 64 and IA-32 Architectures Software Developer’s Manual chapter 17
As for io-ports, no idea, I never used them, but i'm sure that windows will prevent you from setting them in usermode (just like you can't set GD)
Talking about windows, it uses the obsolete GE/LE bits for access to the debugcontrol MSR to enable single stepping to branches only
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OldCheatEngineUser Whateven rank Reputation: 20
Joined: 01 Feb 2016 Posts: 1587
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Posted: Thu Jan 25, 2018 11:47 am Post subject: |
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tons of thanks db.
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About Me;
I Use CE Since Version 1.X, And Still Learning How To Use It Well!
Jul 26, 2020
STN wrote: | i am a sweetheart. |
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toffler Cheater Reputation: 0
Joined: 27 Sep 2012 Posts: 38
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Posted: Fri Jan 26, 2018 4:54 am Post subject: |
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I finally made HWBP work, thanks Dark Byte!
To my surprise, it turned out HWBP take a lot heavier toll on the debugee than SWBP, the cost of broadcasting debug register states to all threads outweighs the punishment for flushing CPU cache in case of SWBPs, at least when you have a couple dozen threads.
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