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Renkokuken GO Moderator Reputation: 4
Joined: 22 Oct 2006 Posts: 3249
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Posted: Thu Dec 21, 2006 4:52 pm Post subject: Register Sets: The Basics! |
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I'll explain the registers and flags to those who wish to know.
Credits: Me, and William C. Runnion, for teaching me.
Segment Registers: An assembly language program is divided into segments. Each segment can be as large as 64K bytes. A program can have many segments, but only 4 segments can be active at any one time of the program execution. The Start Address (Origin Address) of each active segment is specified by the contents of one of the four segment registers.
The four segment registers of the BIU are as follows:
CS-Register: The CS-register specifies the address of the origin of the currently active code segment. A code segment contains executable instructions.
SS-Register: The SS-register specifies the address of the origin of the currently active stack segment. A stack segment contains dynamic data whose storage is allocated and deallocated on demand during execution.
DS-Register: The DS-register specifies the address of the origin of the currently active data segment. A data segment usually contains static data whose storage is allocated prior to execution and is deallocated at program termination. Static data remains fixed through-out program execution.
ES-Register: The ES-Register specifies the address of the origin of the currently active extra segment. An extra segment, like a data segment, usually contains static data.
Instuction Pointer Register:
The IP Register is the Instruction Pointer Register, and always contains the 16-bit offset, within the currently active code segment, of the next instruction byte to be fetched from the memory. The CS:IP register pair always specifies the 20-bit memory address of the next instuction byte to be fetched from memory. The CS Register contents specify the segment origin address of the code segment, and the IP Register contains the offset from this origin address to the address of the instuction byte to be fetched. The CS:IP register pair is said to point to the next instruction byte to be fetched from memory.
General Registers:
There are eight 16-bit general registers in the EU. These registers are divided into three groups. There are four Data Registers (AX, BX, CX, and DX), two Index Registers (DI and SI), and two Pointer Registers (BP and SP). Each of these registers can be used to supply a 16-bit operand and to recieve the 16-bit result from an arithmetic or logical operation performed by the ALU. The four data registers can each be divided into two 8-bit registers: The high-order half of the AX-Register is referred to as the AH-Register, and the lower-half is referred to as the AL-Register. Similarly, The BH and BL are the designators for the two halves of the BX-Register, as the CH and CL for the CX-Register, and finally, the DH and DL for the DX-Register. Each of these registers can be used to supply a 8-bit operand and to recieve the 8-bit result from an arithmetic or logical operation performed by the ALU. In addition to supplying operands and recieving results from the ALU, each of these registers has a specific purpose, as follows:
(E)AX-Register: The AX--Register is the accumulator register and can be used as a single 16-bit word register or as two 8-bit byte registers. Where possible, the AX-Register should be used to accumulate the result of 16-bit arithmetic and logical operations. The AL-Register should be used to accumulate the result of 8-bit arithmetic and logical operations. Even though any of the general registers can be used as the accumulator for most arithmetic and logical operations, use of the AX and AL-Registers produces more efficient machine code. They are also used implicitlyin multiply and divide operations. In addition, the AX and AL-Registers are used in Imput/Output operations.
(E)BX-Register: The BX-Register is the base register and is used to access an item in a data structure.
(E)CX-Register: The CX-Register is the count register and is used as a counter in loop operations. It is also used as a shift counter in multibit shift operations.
(E)DX-Register: The DX-Register is the data register. It is used as an extension to the AX-Register for division and multiply operations, also 32-bit arithmetic.
(E)DI-Register: The DI-Register is the destination index register. It is used with a special set of instructions, called string instructions, that are used for manipulating the elements of character strings and arrays.
(E)SI-Register: The SI-Register is the source index register. It, like the DI-Register, is used with string instructions.
(E)SP-Register: The SP-Register is the stack pointer. It always contains the offset within the stack segment of the current top-of-stack item. The SS:SP registers pair always specifies the 20-bit memory address of the 16-bit word that is current top-of-stack item. The SS-Register contents specify the segment of the origin address of the stack segment, and the SP-Register contains the offset of this origin address to the current top-of-stack item. That is, the SS-SP register pair points to the current top of the stack.
(E)BP-Register: The BP-Register is the base pointer register. It is useful as an auxiliary stack segment pointer when agruments are passed to subprocedures via the stack.
Flag Registers:
The Flags-Register is a 16-bit register contained in the EU. Only 9 of the 16 bits are implemented. Each of these 9 bits has distinctive purposes and indicates something about the current state of the microprocessor. Three of the bits are Control Flags: The direction flag(DF), the interrupt flag(IF), and the trap flag(TF). The other 6 bits are Status Flags.
OverFlow Flag(OF): When the operands on an addition or subtraction operation are interpreted as signed interger values, the OF bit in the flag register indicates whether or not the result of the operation is too large to be stored in the register or memory location that is designated to recieve the result. Producing a result that is too large to be stored is a condition known as an arithmetic overflow. The OF bit also is used to indicate whether or not the most signifigant bit changes on a shift operation.
Direction Flag(DF): String instructions automatically update the SI and/or DI registers to point to the next (or previous) character in a string or element in an array. The DF bit in the flags register is used to control whether this automatic update is an increment (DF=0) to the next character or array element or a decrement (DF=1) to the previous character or array element.
Interrupt Flag(IF): An external interrupt is a request for service from some tangible external device. The IF bit of the flags register controls whether the microprocessor processes external interrupts (IF=1) or ignores external interrupts (IF=0).
Trap Flag(TF): The microprocessor has a single-step mode that allows for program intervention after each instruction execution of another program. That is, the single-step mode allows one program to trace the execution of another program. The DEBUG and CodeView utility programs help programmers trace the execution of their programs. They use single-step mode to provide this service. The TF bit in the flags register determines whether the microprocessor is in single-step mode (TF=1) or not in single-step mode(TF=0).
Sign Flag(SF): The SF bit of the flags register is used to hold a copy of the most significant bit of the result of arithmetic and logical operations. The result is being interpreted as a signed interger, then the SF bit reflects the sign of that result (SF=0 implies not negitive, SF=1 implies negative). The SF is used when binary numbers are compared. In cunjunction with the ZF, the SF is used to determine which of two unequal binary numbers is the larger.
Zero Flag(ZF): The ZF bit of the flags register is used to indicate whether or not the result of an arithmetic or logical operation is zero (ZF=1 implies the result is 0, ZF=0 implies the result is non-zero). The ZF is used when binary numbers are compared. It reflects whether or not two binary numbers are equal.
Auxiliary Carry Flag(AF): The AF bit of the flags register is used to reflect the carry out of or burrow into bit position 3 on an addition or subtraction operation. It is used in operations using binary coded decimals (BCD) numbers.
Parity Flag(PF): A technique that detects single-bit errors in the transmission of binary data is to add a parity bit to each bit pattern transmitted. The Parity bit is chosen in such a way that the number of 1 bits in the bit pattern being transmitted is always odd (Odd Parity Code) or always even (Even Parity Code). If the recieving device recieves a bit pattern that has the wrong parity, then it knows that an error has occured in the transmission. The PF bit of the flags register reflects the parity of the lower 8-bits of the result of an arithmetic or logical operation (PF=0 implies odd parity; PF=1 implies even parity).
Carry Flag(CF): The CF bit is used to reflect the carry out of or burrow into the most significant bit of an addition or subtraction. The CF bit is also used to record the last bit shifted out of a register or memory operand in a binary shift operation. The CF bit of the flags register reflects an overflow of an addition or subtraction operation when the operands and the result are interpreted as unsigned intergers.
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Here are some images of the Register Sets:
General Registers
Flags Register
I hope I have given you a clearer view of the Register Sets.
<3 I'll be back to discuss more when people ask.
Ask me what you want me to teach next, and I'll do it.
<3 Have a nice day all.
Last edited by Renkokuken on Fri Oct 05, 2007 9:40 am; edited 1 time in total |
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KillerClown Master Cheater Reputation: 0
Joined: 27 Nov 2006 Posts: 471
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Posted: Thu Dec 21, 2006 4:54 pm Post subject: |
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I can't wait to read this Rob, it looks great.
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Dark Byte Site Admin Reputation: 458
Joined: 09 May 2003 Posts: 25295 Location: The netherlands
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Posted: Fri Dec 22, 2006 2:34 am Post subject: |
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Nice, although a little outdated (64kb segment size, 16-bit flags,...)
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Renkokuken GO Moderator Reputation: 4
Joined: 22 Oct 2006 Posts: 3249
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Posted: Fri Dec 22, 2006 1:24 pm Post subject: |
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How much more up-to-date are we? I know that the CE's Register Sets are 32-bit.
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Blackheart Advanced Cheater Reputation: 0
Joined: 19 Dec 2006 Posts: 97 Location: Antarctica
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Posted: Sun Dec 24, 2006 6:40 pm Post subject: |
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Thank you Renkokuken, this should help me understand a lot better.
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igrek312 Expert Cheater Reputation: 0
Joined: 25 May 2006 Posts: 172
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Posted: Wed Dec 27, 2006 11:50 am Post subject: |
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flamingwolf wrote: | <3 renko. looks niceee |
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Renkokuken GO Moderator Reputation: 4
Joined: 22 Oct 2006 Posts: 3249
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Posted: Fri Jan 05, 2007 12:24 pm Post subject: |
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=D
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bloodymolecule Grandmaster Cheater Reputation: 0
Joined: 09 Jan 2007 Posts: 533
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Posted: Mon Jan 22, 2007 1:23 am Post subject: |
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JOo love me T.T?
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A4 Master Cheater Reputation: 0
Joined: 28 Oct 2006 Posts: 429
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kkid28 Expert Cheater Reputation: 0
Joined: 30 Sep 2006 Posts: 110 Location: The only flat part of the planet.
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Posted: Sun Feb 04, 2007 12:34 am Post subject: |
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Renkokuken wrote: | How much more up-to-date are we? I know that the CE's Register Sets are 32-bit. |
About 7 years. Windows 2000/XP/NT came out in ~2000 and they're 32-bit. 16-bit was Windows 98.
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AB1110 How do I cheat? Reputation: 0
Joined: 26 Jan 2007 Posts: 6
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Posted: Sun Feb 04, 2007 2:06 am Post subject: |
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Great guide ^^
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Renkokuken GO Moderator Reputation: 4
Joined: 22 Oct 2006 Posts: 3249
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Posted: Thu Feb 15, 2007 11:50 am Post subject: |
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Ah, I'm a little out-dated, but at least this is the true meaning of these Register Sets, and not just what you want from Maple or other games.
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Infamous Master Cheater Reputation: 0
Joined: 15 Sep 2006 Posts: 359
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Posted: Sun Feb 18, 2007 9:06 pm Post subject: |
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Very nice. =D
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Renkokuken GO Moderator Reputation: 4
Joined: 22 Oct 2006 Posts: 3249
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Posted: Fri Feb 23, 2007 2:32 am Post subject: |
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Memorex wrote: | Very nice. =D | Thanks.
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nog_lorp Grandmaster Cheater Reputation: 0
Joined: 26 Feb 2006 Posts: 743
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Posted: Sun Feb 25, 2007 1:45 am Post subject: |
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Wonderful. I'm very glad to see someone is battling the group idiocy that seems to have overrun quite a few hacking communities lately.
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